

   +-----------------------------------------------------------------------+
   |                                                                       |
   |          I have noticed that the DSP56k has no facility for doing     |
   |          binary shifting (left or right). I ask because in the        |
   |          microprocessor world we use shifts in place of multiplying   |
   |          by 2 (of course this is only one use). So, is there any      |
   |          efficient way to perform shifting on the DSP56000.           |
   |                                                                       |
   +-----------------------------------------------------------------------+


There are many ways to shift data in the DSP56000.  These include
one  bit  arithmetic,  logical or  rotate shifts left or right as
well as multiple shifts  left or  right.  There is even a one bit
dynamic  scaling  (up  or  down)  mechanism.  These approaches to
shifting  are described below in four sections:

1. One-Bit Shifts/Rotates
2. Multi-Bit Shifts/Rotates
3. Fast Multi-Bit Shifts
4. No Overhead, Dynamic Scaling.


  1.One-Bit Shifts/Rotates:
 
For  one  bit  shifts/rotates  of  either  56-bit  accumulator  A 
( A  =  A2:A1:A0  =  8 bits : 24  bits : 24  bits )   or   56-bit
accumulator  B ( B = B2:B1:B0 = 8 bits : 24 bits : 24 bits )  use
the  arithmetic shift right (ASR) and arithmetic shift left (ASL)
instructions.  If  you want to do one-bit shifts on just the most
significant  24  bit  word  of  the  accumulator A, namely A1, or
accumulator B, namely B1, use the rotate right (ROR), rotate left
(ROL),  logical  shift  right  (LSR), or logical shift left (LSL)
instructions.


  2. Multi-Bit Shifts/Rotates:
  

The  simplest  and  most straight forward approach for multi-bit
shifts/rotates  of the accumulator is to use ASR, ASL, LSR, LSL,
ROR, or ROL with the repeat (REP) instruction or the hardware do
(DO) instruction.
  
          example:    REP #n           example:     DO #n,END1   
                      ASL A                         ASR A
                                                END1 

where n is the number of positions to be shifted/rotated.

Note:  that the repeat instruction is not interruptible whereas
the DO instruction is interruptible.
   
The DSP56000 Macro Cross Assembler supports macros with the MACRO
DEFINITION  and  MACLIB  directives  ( see  the  Macro  Assembler
Reference  Manual,  pages  6-46 and  6-47).

The above set of instructions for multi-bit shifts/rotates can be
incorporated  into  two macros, one for left shifts and the other
for right shifts as follows:


For the two macros below:

      Let    acc = accumulator A or B
              n  = the number of bits of the shift  
        SHRAC  macro  acc,n   ;shift accumulator right n bits
               rep #n         ;macro definition
               asr acc
               endm
       
        SHLAC  macro acc,n    ;shift accumulator left n bits
               rep #n         ;macro definition
               asl acc
               endm

SHRAC  is  the name of the SHift Right ACumulator macro and SHLAC
is the name of the SHift Left ACcumulator macro.


3. Fast Multi-Bit Shifts:

The  fastest  and  simplest  way  to  do multi-bit shifting is to
multiply  the  operand by a constant.In the case of a right shift
the constant, KR ,is a fraction given by




                       KR = 2**(-n)


Consider the  following  example where it is desired to shift the
content of X0  right by 4 bits.  The shifted  result  resides  in
accumulator A. 
                                       ;if n=4 then
                                       ;KR=0.0625 and therefore
            example:    MOVE #KR,X1    ;X1=HEX 080000 . If
                        MPY  X0,X1,A   ;X0=HEX 060000 then A1
                                       ;will be HEX 006000 i.e.
                                       ;X0 shifted right by 4
                                       ;bits

Similarly  consider  the following example where it is desired to
shift  the  content  of  X0 left by 4 bits and return the shifted
result to accumulator A.In the case of a left shift the constant,
KL ,is an integer given by



                       KL = 2**(n-1)

                                       ;if n=4 then
                                       ;KL=8 and therefore
            example:   MOVE #>KL,X1    ;X1=HEX 000008. If
                       MPY  X0,X1,A    ;X0=HEX 060000 then A0
                                       ;will be HEX 600000 i.e.
                                       ;X0 shifted left by 4
                                       ;bits


KL is 2**(n-1) and not 2**(n) because the DSP56000 multiplier is
fractional  thereby  automatically  implementing  a one-bit left
shift.

Generating the constants for the shifts is made easy by using the
POW  and  CVI  functions  built-in  to  the  DSP56000 Macro Cross
Assembler.  The  "raise to the power"  function, POW ,  returns a
real number for any base raised to a real number. 
For example,
                    K = @pow(2,-4)  returns  0.0625, 
            and     K = @pow(2,+4)  returns 16.0.

Because  DSP56000  is  a  fractional  machine  the Assembler will
"limit"  the  real numbers. Consequently the object code for 16.0
will  be HEX 7FFFFF or +.999999.  This is incorrect.  In order to
obtain  the  integer   form  of  the  real  number  the Assembler
provides a "convert to integer", CVI , function. The CVI function
converts real numbers to integers. In our example

                    @cvi(@pow(2,+4))
 
returns 16 which will be  HEX 000010 in object code.

The above instruction sets can be put in two distinct macros for 
programming ease.  The two  macros are MSHR for Multi-bit SHifts
Right and MSHL for Multi-bit SHifts Left.

For the  macros below:
          Let        s   = the source register
                     m   = the multiplier register
                     n   = the number of bits to be shifted
                     acc = the destination accumulator
         
          where  s   can be X0,X1,Y0,Y1
                 m   can be X0,X1,Y0,Y1
          and    acc can be A or B 

       MSHR  macro s,m,n,acc       ;four input variables.
             move  #@pow(2,-n),m   ;load the multiplier register
             mpy   s,m,acc         ;shift
             endm
                  
       MSHL  macro s,m,n,acc               ;four input variables
             move  #>@cvi(@pow(2,n-1)),m   ;load the mult. reg.
             mpy   s,m,acc                 ;shift
             endm

           
                 
The  immediate long data move (note the greater than sign, > , in
the move instruction) MUST be used in the MSHL example because we
do  not  want  the  data  treated  as  a  fraction  and   shifted
accordingly. Note the following example:
     
    For       MOVE #2,X1   X1 will be HEX 020000 because the
                           the immediate short data is treated as
                           an 8-bit fraction occupying the two
                           most significant bytes of the
                           destination register;
  
    While for MOVE #>2,X1  X1 will be HEX 000002 because the data
                           is treated as an integer occupying the
                           least significant bytes of the
                           destination register with sign
                           extension.
      
 
The immediate long data move is a two word instruction which
executes in two instruction cycles while the immediate short 
data  move  is  a one word instruction which executes in one
instruction cycle.

The  immediate  short  data move can be used for multi-bit right
shifts of less than or equal to 8 bits. For right shifts of more
than  eight  bits the immediate long data move must be used with
the appropriate  24-bit  fraction,  2**(-n),  (utilizing the POW
directive for example).

4. No Overhead,Dynamic Scaling (one bit shifts):
 
For  no  overhead one bit shifts of either accumulator A or B use
the scaling mode.In this case the shift occurs automatically when
data   is  transferred  from  either  of  the  56-bit  data   ALU
accumulators A or B to the XD or YD buses. This shift function is
activated  by  appropriately setting the scaling mode bits in the
status register.

For more details on the scaling mode consult the DSP56000 Digital
Signal  Processor  User's  Manual  DSP56000UM/AD page 4-9 and the
DATA ALU  subsection  in the BLOCK DIAGRAM DESCRIPTION section of
the DSP56000 Technical Summary(BR282), which is available on this
bulletin  board  as  document  d1  in the  Motorola Documentation
section.
