* Amlogic GXBB Clock and Reset Unit

The Amlogic GXBB clock controller generates and supplies clock to various
controllers within the SoC.

Required Properties:

- compatible: should be:
		"amlogic,gxbb-clkc" for GXBB SoC,
		"amlogic,gxl-clkc" for GXL and GXM SoC,
		"amlogic,axg-clkc" for AXG SoC.
- clocks : list of clock phandle, one for each entry clock-names.
- clock-names : should contain the following:
  * "xtal": the platform xtal

- #clock-cells: should be 1.

Each clock is assigned an identifier and client nodes can use this identifier
to specify the clock which they consume. All available clocks are defined as
preprocessor macros in the dt-bindings/clock/gxbb-clkc.h header and can be
used in device tree sources.

Parent node should have the following properties :
- compatible: "syscon", "simple-mfd, and "amlogic,meson-gx-hhi-sysctrl" or
              "amlogic,meson-axg-hhi-sysctrl"
- reg: base address and size of the HHI system control register space.

Example: Clock controller node:

sysctrl: system-controller@0 {
	compatible = "amlogic,meson-gx-hhi-sysctrl", "syscon", "simple-mfd";
	reg = <0 0 0 0x400>;

	clkc: clock-controller {
		#clock-cells = <1>;
		compatible = "amlogic,gxbb-clkc";
		clocks = <&xtal>;
		clock-names = "xtal";
	};
};

Example: UART controller node that consumes the clock generated by the clock
  controller:

	uart_AO: serial@c81004c0 {
		compatible = "amlogic,meson-uart";
		reg = <0xc81004c0 0x14>;
		interrupts = <0 90 1>;
		clocks = <&clkc CLKID_CLK81>;
	};
